1. Field of the Invention
This invention relates to D/A conversion apparatus and method of a floating type which perform level conversion of input digital data by different conversion factors, converts the resulting data into analog data, then restores the analog data to an original level of the input digital data, and carries out addition of the analog data, thereby achieving an increased dynamic range of the reproduced sound.
2. Prior Art
In recent years, the conversion accuracy of A/D converters has been improved owing to delta-sigma modulators of higher order, and with this improvement, there is an increasing demand for further enhancement in the resolution and dynamic range of D/A converters. To meet the demand, a D/A conversion apparatus of a floating type has been conventionally developed which uses a D/A converter (hereinafter referred to as the xe2x80x9cDACxe2x80x9d) having a limited number of bits for conversion, and is capable of realizing a resolution and a dynamic range exceeding respective levels attainable by the limited number of bits for conversion. In this type of converter, when an N-bit (e.g. 20-bit) DAC is used for carrying out D/A conversion of M-bit (M greater than N: e.g. 24-bit) digital data, if the digital data has P bits (Mxe2x89xa7P greater than N) as effective bits, the digital data is directly subjected to D/A conversion without being further processed, and Mxe2x88x92N less significant bits (e.g. four less significant bits) are truncated. On the other hand, if the input level of the digital data is lowered so that the effective word length of the same is reduced to Pxe2x80x2 bits (Pxe2x80x2xe2x89xa6N), the digital data is converted into data obtained by multiplying the same by a conversion factor of 2Mxe2x88x92N, i.e. by shifting the original data toward MSB (most significant bit) by Mxe2x88x92N bits so that the Mxe2x88x92N less significant bits have a value of zero, and then the resulting level-converted data is subjected to D/A conversion. Whether input digital data is to be subjected to D/A conversion without being further processed or after being multiplied by the conversion factor of 2Mxe2x88x92N is determined depending on whether an overflow of data occurs when the input digital data is shifted by Mxe2x88x92N bits.
In the D/A conversion apparatus constructed as above, when input data has P significant bits as effective bits, the length of word or bits for conversion is sufficiently large, so that the effect of the truncation of the Mxe2x88x92N less significant bits is almost negligible (even if a problem occurs due to the truncation, it can be solved e.g. by additionally carrying out dithering as required). On the other hand, when the effective bit length of input data is Pxe2x80x2 bits, the data is multiplied by the conversion factor of 2Mxe2x88x92N, and the Mxe2x88x92N less significant bits thereof are truncated during the D/A conversion. Therefore, in this case, Mxe2x88x92N less significant bits of the data which would be truncated if the data were not multiplied by the conversion factor of 2Mxe2x88x92N can be effectively D/A converted, whereby an increased resolution and an increased dynamic range are achieved. In the latter case, however, since an analog signal output from the DAC also has a magnitude multiplied by 2Mxe2x88x92N, it is required to carry out a level adjustment by multiplying the analog output by 1/2Mxe2x88x92N. 
The D/A conversion apparatus of the floating type constructed as above includes one which employs a single DAC and the gain of an amplifier that amplifies an output from the single DAC is switched according to the conversion factor by which the level of input digital data is converted, and another which employs a plurality of DAC""s that perform D/A conversion of plural pieces of digital data obtained through level conversion of input digital data by respective different conversion factors, and one of the outputs from the DAC""s which has been subjected to the level conversion by the most appropriate conversion factor is selected (Japanese Patent Publication (Kokoku) No. 7-93579).
However, according to the former floating-type D/A conversion apparatus, since it is required to switch the gain of the analog amplifier instantaneously according to the level of the digital data, the output of the amplifier cannot follow up the switching, or DC offset of the amplifier can fluctuate, which can produce untoward noise which is audible. The latter floating-type D/A conversion apparatus also switches between analog signals output from the DAC""s, so that transient noise occurs upon the switching. These problems are extremely serious particularly when the resolution of digital data to be subjected to D/A conversion covers even a low noise range e.g., an SN ratio of 120 to 140 dB which can be conventionally realized only by analog circuitry.
It is an object of the present invention to provide a D/A conversion apparatus and a D/A conversion method which are of a floating type and capable of further minimizing the adverse influence of noise to thereby achieve an increased dynamic range.
To attain the above object, according to a first aspect of the invention, there is provided a D/A conversion apparatus comprising a digital signal processor that carries out level conversion of same input digital data by different conversion factors into a plurality of level-converted digital data, selects and outputs most appropriate data of the plurality of level-converted digital data based on a signal quality of each of the plurality of level-converted digital data, outputs other data of the plurality of level-converted digital data after attenuating the other data to or below a predetermined noise level, and switches between data previously selected as the most appropriate data and data newly selected as the most appropriate data by carrying out cross-fading between the previously selected data and the newly selected data, a plurality of D/A converters that carry out D/A conversion of the plurality of level-converted digital data output from the digital signal processor to respective analog signals and outputs the analog signals, and an analog adder device that carries out level conversion of the analog signals output from the plurality of D/A converters again based on respective corresponding ones of the conversion factors in a manner such that resulting analog signals have a level corresponding to a level of the input digital data, and then adds together all of the level-converted analog signals, wherein the digital signal processor carries out the switching over a predetermined cross-fading time period when an amplitude level of the input digital data crosses a predetermined threshold level from a larger side than the predetermined threshold level to a smaller side than the predetermined threshold level, insofar as the amplitude level of the input digital data does not cross the predetermined threshold level from the smaller side to the larger side for a predetermined hold time period, and wherein the predetermined threshold level comprises a plurality of threshold levels, the predetermined hold time period and the predetermined cross-fading time period being set in a manner corresponding to each of the plurality of threshold levels such that as the predetermined threshold level is smaller, the predetermined hold time period and the predetermined cross-fading time period are set to respective shorter time periods.
According to this D/A conversion apparatus, (1) results of a plurality of digital data obtained by D/A conversion are added for analog output, (2) switching of outputs of D/A conversion is carried out by switching attenuation degrees of digital data, (3) cross-fading is carried out for switching between converted digital data, and (4) the switching to selected digital data is carried out when a level (amplitude level) of the input digital data crosses a predetermined threshold level from a larger side than the predetermined threshold level to a smaller side than the predetermined threshold level, insofar as the level of the input digital data does not cross the predetermined threshold level from the smaller side to the larger side for a predetermined hold time period. This makes it possible to reduce generation of noises due to switching to a very low level, and at the same time prevent noises from being generated due to frequent switching operations of digital data.
Further, according to the D/A conversion apparatus, there are provided a plurality of threshold levels as the predetermined threshold level, and the predetermined hold time period and the predetermined cross-fading time period are set in a manner corresponding to each of the plurality of threshold levels such that as the predetermined threshold level is smaller, the predetermined hold time period and the predetermined cross-fading time period are set to respective shorter time periods. Therefore, for example, when the level sharply changes from a large level to a small level, the switching of the selected level-converted digital data, i.e., the switching of the range of the input digital data for D/A conversion is promptly carried out. That is, the speed of switching to newly-selected digital data can be changed in a manner adapted to a degree of lowering of D/A conversion accuracy. This makes it possible to enhance the reproducibility of sounds such as a modulation effect.
Preferably, the digital signal processor carries out the cross-fading by setting the predetermined hold time period and the predetermined cross-fading time period to respective time periods corresponding to a largest one of the plurality of threshold levels, when a time period between a time point the amplitude level of the input digital data becomes smaller than the largest one of the plurality of threshold levels and a time point the amplitude level of the input digital data becomes smaller than a next smaller one of the plurality of threshold levels exceeds a predetermined time period, or when the amplitude level of the input digital data becomes lower than the largest one of the plurality of threshold levels, then becomes smaller than the next smaller one of the plurality of threshold levels, and then becomes larger than the next smaller one of the plurality of threshold levels again within the predetermined time period.
According to this preferred embodiment, only when the level (amplitude level) of the input digital data sharply changes from a larger one to a smaller one, the switching of the selected level-converted digital data, i.e. the switching of the range of the input digital data for D/A conversion is promptly carried out, whereas when the level of the input digital data gently changes from a large one to a small one, or when the same only temporarily passes through a range of small levels, the predetermined hold time period and the predetermined cross-fading time period are set to respective largest time periods. Therefore, it is possible to prevent frequent switching of the range of the input digital data for D/A conversion due to superposition of low-frequency components and high-frequency components, and thereby suppress generation of noises.
Preferably, the digital signal processor includes a delay device that delays the input digital data by a second predetermined time period, and a detector that detects the amplitude level of the input digital data before being delayed by the delay device, and wherein the second predetermined time period is set to or larger than a time period required for the cross-fading to be executed, such that the cross-fading is completed when the amplitude level of the input digital data crosses the predetermined threshold level from the smaller side to the larger side.
According to this preferred embodiment, the timing of start of the cross-fading for switching to the newly selected data of the level-converted digital data can be made earlier than timing of start of the D/A conversion of a portion of the input digital data whose level crossed the predetermined threshold level such that the cross-fading is completed before the start of the D/A conversion of the portion, whereby it is possible to prevent part of the input digital data from being clipped.
The present invention employs a method of switching digital data input to the DAC""s for increasing the dynamic range. Compared with a method of switching analog signals output from the DAC""s, the method of the present invention has an advantage of less noise being produced upon the switching. On the other hand, a D/A converter device having its input level attenuated generates residual noises which are input to the analog adder, and the residual noises have an adverse influence on the increase of the dynamic range. More specifically, assuming that the conversion factor of the input digital data is expressed by G, the residual noises are input to the analog adder after they are multiplied by 1/G, and therefore, as the conversion factor is smaller, the larger residual noises are input to the analog adder. So long as the level of the input digital data is large, the residual noises are negligible, but if the level of the input digital data is small, the level of the resulting residual noises becomes so large that they are not negligible, so that the dynamic range cannot be improved.
To eliminate this inconvenience, it is preferred that the D/A conversion apparatus further includes an analog attenuator circuit that carries out attenuation of medium-to-high frequency components of an analog signal obtained by carrying out the D/A conversion of the other data of the level-converted digital data by a corresponding one of the D/A converters before the analog signal is input to the analog adder device, when the other data is converted by a smaller conversion factor than one of the conversion factors by which the input digital data is converted into the selected most appropriate data.
According to this preferred embodiment, the analog signal obtained by the D/A conversion of non-selected other data of the level-converted digital data is attenuated by the analog attenuator circuit so as to prevent the residual noises of the non-selected digital data from becoming larger than those of the selected digital data which eventually provide a significant analog signal. This prevents the reduction of residual noises in the ultimate analog signal output, i.e. the reduction of the noise floor, from being spoiled even when the analog signals obtained by D/A conversion of the level-converted digital data are added together to form the ultimate analog signal output, to thereby improve the dynamic range. It should be noted that the digital data to be subjected to the analog attenuation is digital data which has at least a larger possibility of the residual noises thereof being larger than those of the selected digital data, i.e. digital data which is subjected to the level conversion by a smaller conversion factor than that by which the selected digital data is subjected to the level conversion. It suffices practically to reduce the level of the analog signal corresponding to the non-selected digital data other than the selected digital data such that it has a noise level lower than the noise level of the analog signal corresponding to the selected digital data.
Further, the analog attenuator circuit attenuates only medium-to-high frequency components of the analog signal from the D/A converter. Therefore, the input impedance of DC components or low freuency components of the analog adder device does not change even if the analog attenuator circuit turns on or off. This suppresses the fluctuation of the output offset caused by fluctuation of the DC gain of the analog adder device, thereby effectively preventing pop noise from being generated when the D/A converter carries out switching operation.
Preferably, the D/A conversion apparatus includes an attenuating signal output device that delivers an attenuation-instructing signal instructing execution of the analog attenuation, to the analog attenuator circuit, when level-converted digital data obtained by converting the input digital data by a largest one of the conversion factors is selected and output.
Preferably, the analog attenuator circuit comprises a low-pass filter.
More preferably, the attenuating signal output device outputs the attenuation-instructing signal in a manner such that the analog attenuator circuit stops attenuation of the analog signal a second predetermined time earlier than start of the cross-fading, when the amplitude level of the input digital data crosses the predetermined threshold level from the smaller side to the larger side, and starts attenuation of the analog signal upon termination of the cross-fading, when the amplitude level of the input digital data crosses the predetermined threshold level from the larger side to the smaller side.
According to this preferred embodiment, it is possible to prevent transient noises from being generated when the analog attenuator circuit starts and stops the analog attenuation.
To attain the above object, according to a second aspect of the invention, there is provided a D/A conversion method comprising the steps of carrying out level conversion of same input digital data by different conversion factors into a plurality of level-converted digital data, respectively, selecting and outputting most appropriate data of the plurality of level-converted digital data based on a signal quality of each of the plurality of level-converted digital data, and outputting other data of the plurality of level-converted digital data after attenuating the other data to or below a predetermined noise level, switching between data previously selected as the most appropriate data of the plurality of level-converted digital data and data newly selected as the most appropriate data by carrying out cross-fading between the previously selected data and the newly selected data, carrying out D/A conversion of the plurality of level-converted digital data to respective analog signals and outputting the analog signals, and carrying out level conversion of the analog signals again based on respective corresponding ones of the conversion factors in a manner such that resulting analog signals have a level corresponding to a level of the input digital data, and then adding together all of the level-converted analog signals, wherein the switching is carried out over a predetermined cross-fading time period when an amplitude level of the input digital data crosses a predetermined threshold level from a larger side than the predetermined threshold level to a smaller side than the predetermined threshold level, insofar as the amplitude level of the input digital data does not cross the predetermined threshold level from the smaller side to the larger side for a predetermined hold time period, and wherein the predetermined threshold level comprises a plurality of threshold levels, the predetermined hold time period and the predetermined cross-fading time period being set in a manner corresponding to each of the plurality of threshold levels such that as the predetermined threshold level is smaller, the predetermined hold time period and the predetermined cross-fading time period are set to respective shorter time periods.
According to the method of the second aspect of the invention, it is possible to obtain the same advantageous effects as obtained by the D/A conversion apparatus of the first aspect of the invention.
The above and other objects, features and advantages of the invention will become more apparent from the following detailed description taken in conjunction of the accompanying drawings.